1. Technical Field
The present invention relates in general to digital-to-analog converters, and in particular to methods and systems for self-calibrating digital-to-analog converters.
2. Description of the Related Art
Digital-to-analog (D/A) conversion is the process of converting digital codes into a continuous range of analog signal levels. Digital-to-analog converters (DACs) are used in a variety of electronics, including high-performance digital audio equipment such as compact disc players. Some DACs are designed for special applications, such as video graphic outputs, high-definition video displays, ultra high-speed signal processing, digital video tape recording, digital attenuators, or high-speed function generators. In such applications, the dynamic behavior of the D/A conversion system plays an important role in overall performance. The major factors that determine the quality of performance of DACs are resolution, sampling rate, speed, and linearity. Generally, the accuracy of the DAC's measurement and conversion is specified by the converter's linearity.
"Integral linearity" is a measure of linearity over the entire conversion range. It is defined as the deviation from a straight line drawn between the maximum point and through zero (or the offset value) of the conversion range. "Differential linearity" is the linearity between or adjacent steps of the analog output. Differential linearity is a measure of the monotonicity of the converter. The converter is said to be monotonic if increasing input values result in increasing output values.
Digital codes are typically converted to analog voltages by assigning a voltage weight, or current weight, to each bit in the digital code and summing the voltage or current weights of the entire code. This type of DAC is called a binary weighted DAC, and it consists of a network of precision resistors, input switches, and level shifters to activate the switches to convert a digital code to an analog current or voltage. DACs that produce an analog current output usually have a faster settling time and better linearity than those that produce a voltage output, so DACs that utilize current sources are more often used.
As is well known in the art, a "segmented" DAC design converts digital codes to analog signals by activating a number of equally weighted segments proportional to the input digital code and summing the activated segments to form the analog output signal. Such a segmented DAC contains a large number of these equal valued segments, where each segment produces an equal current or voltage, to produce a large range of output levels.
While the ability to precisely process identical segments in segmentation schemes of this type improves differential linearity by a considerable amount over a straight binary weighted implementation, process tolerances are too large to achieve the integral linearity requirements of modern high performance digital to analog converters. Integral linearity can be expected to vary by as much as 3-6 LSBs in modern 10-bit segmented DACs.
To improve integral linearity of a binary weighted DAC, the analog output is calibrated and trimmed to bring the performance of the DAC closer to ideal. In the prior art, multiple reference sources provide a plurality of highly toleranced calibration signals that are toleranced within the required integral linearity for each analog output step corresponding to a digital input code. For example, the calibration signals may be accomplished by a voltage divider tapped at equal intervals of voltage levels. Each analog output step is compared with a corresponding calibration signal to determine the calibration error, and then the analog output for that binary code is trimmed to compensate for the error.
While this calibration scheme provides the required linearity, there remains some error because each output level is calibrated against a different reference source. What is needed is a calibration scheme having improved integral linearity, where every analog output level is calibrated with respect to the same reference source, thereby eliminating any non-linearity derived from using a plurality of calibration references that are not, themselves, perfectly toleranced.
In addition, such a scheme needs to be self-calibrating. Standard calibration schemes are performed when the DAC is manufactured, and the DAC is permanently trimmed. However, changes in the operating environment of the DAC over the life of the DAC, such as temperature or output load, may alter the calibration. Therefore, what is needed is a segmented DAC capable of self-calibration to allow continuous calibration over the life of the DAC. More particularly, what is needed is a segmented DAC capable of self-calibration with respect to a single calibration reference to improve differential linearity and integral linearity.